Abstract
In this paper, we describe a systematic approach to optimize and analyze the equivalent characteristic impedance of practical via structures. the procedure consists of (a) optimizing via structures for impedance matching using a Genetic algorithm, and (b) numerically characterize, by stochastic collocation method, the sensitivity of the equivalent characteristic impedance to the manufacturing uncertainties in the various geometrical parameters of a via structure. Such procedure naturally leads to a rigorous methodology for EM design/control in the presence of multiple sources of uncertainty. ©2010 IEEE.
Recommended Citation
J. Shen et al., "Analyzing Via Impedance Variations with a Stochastic Collation Method," IEEE International Symposium on Electromagnetic Compatibility, pp. 552 - 556, article no. 5711336, Institute of Electrical and Electronics Engineers, Dec 2010.
The definitive version is available at https://doi.org/10.1109/ISEMC.2010.5711336
Department(s)
Electrical and Computer Engineering
Keywords and Phrases
Numerical analysis; Optimization; Stochastic collocation method; Via impedance
International Standard Book Number (ISBN)
978-142446305-3
International Standard Serial Number (ISSN)
1077-4076
Document Type
Article - Conference proceedings
Document Version
Citation
File Type
text
Language(s)
English
Rights
© 2024 Institute of Electrical and Electronics Engineers, All rights reserved.
Publication Date
01 Dec 2010