Abstract
In this paper, we propose a master-slave SoC structure composed of an ARM7-TDMI and a co-processor for Mahala Nobis distance calculation. the SoC was implemented on an Actel ProASIC series M7A3P1000 FPGA. Furthermore, we implement a HMM based speech recognition system based on this SoC. Compared with the conventional ASIC co-processor and slave SoC structure, the new master-slave structure reduces the number of SRAM access and improves the bus efficiency. Experiment results show that with 1.40s Chinese speech feixi and 24MHz clock, the processing time of the M-S SoC system is 1.85s, a 64.12% reduction compared with the software implement on ARM7-TDMI, and a 5.95% reduction compared with slave structure SoC. © 2012 IEEE.
Recommended Citation
H. Geng et al., "A Master-slave SoC Structure for HMM based Speech Recognition," 2012 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2012 - Proceedings of Technical Papers, article no. 6212657, Institute of Electrical and Electronics Engineers, Jul 2012.
The definitive version is available at https://doi.org/10.1109/VLSI-DAT.2012.6212657
Department(s)
Electrical and Computer Engineering
Keywords and Phrases
ARM7-TDMI; Master; SoC; speech recognition
International Standard Book Number (ISBN)
978-145772081-9
Document Type
Article - Conference proceedings
Document Version
Citation
File Type
text
Language(s)
English
Rights
© 2024 Institute of Electrical and Electronics Engineers, All rights reserved.
Publication Date
25 Jul 2012
