Abstract
Printed circuit Boards (PCBs) often have high speed data traces crossing splits in the adjacent reference planes due to space limitations and cost constraints. These split planes are usually different power islands on nearby layers. This work quantifies the effect of the split plane and the associated stitching capacitor for various stack up configurations. © 2009 IEEE.
Recommended Citation
W. Pan et al., "Predicting Noise Voltage from Trace Crossing Split Planes on Printed Circuit Boards," IEEE International Symposium on Electromagnetic Compatibility, pp. 45 - 50, article no. 5284660, Institute of Electrical and Electronics Engineers, Dec 2009.
The definitive version is available at https://doi.org/10.1109/ISEMC.2009.5284660
Department(s)
Electrical and Computer Engineering
International Standard Book Number (ISBN)
978-142444267-6
International Standard Serial Number (ISSN)
1077-4076
Document Type
Article - Conference proceedings
Document Version
Citation
File Type
text
Language(s)
English
Rights
© 2024 Institute of Electrical and Electronics Engineers, All rights reserved.
Publication Date
01 Dec 2009
