Abstract

A systematic approach for inductance extraction for via arrays between two parallel planes is presented. Both self and mutual inductance values are obtained based on a cavity model. the physics associated with the via inductances is analyzed, and a rigorous method is developed to derive an equivalent total inductance for multiple via arrays. Analytical equations for the equivalent total inductance are derived in closed forms for simple cases. the proposed method is corroborated with measurements, and application of the method for power distribution network designs is demonstrated. © 2010 IEEE.

Department(s)

Electrical and Computer Engineering

Keywords and Phrases

Cavity model; decoupling capacitor; equivalent total inductance; integrated circuit (IC) pin layout; parallel planes; power distribution network (PDN); via inductance extraction

International Standard Serial Number (ISSN)

0018-9480

Document Type

Article - Journal

Document Version

Citation

File Type

text

Language(s)

English

Rights

© 2024 Institute of Electrical and Electronics Engineers, All rights reserved.

Publication Date

01 Sep 2010

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