Abstract
The solution of EM/Circuit problems is important for the EMC/SI/PI system designs. an essential issue today is the solution of larger problems without excessive memory and compute time requirements. in this paper, we show the potential for a new speed-up approach using the PEEC method. One source of the speed-up is due to the use of the waveform relaxation (WR) technique, which is very suitable for parallel processing. Importantly, the dense part of the partial inductance and potential matrices are sparsified by taking advantage of the rank deficiency of the dense parts of the MNA matrix. We show that both time as well as storage can be saved. © 2012 IEEE.
Recommended Citation
G. Antonini and A. E. Ruehli, "Speed-up of PEEC EM/Ckt Solver using Rank-reduced Waveform Relaxation," IEEE International Symposium on Electromagnetic Compatibility, pp. 509 - 514, article no. 6351679, Institute of Electrical and Electronics Engineers, Dec 2012.
The definitive version is available at https://doi.org/10.1109/ISEMC.2012.6351679
Department(s)
Electrical and Computer Engineering
International Standard Book Number (ISBN)
978-146732061-0
International Standard Serial Number (ISSN)
2158-1118; 1077-4076
Document Type
Article - Conference proceedings
Document Version
Citation
File Type
text
Language(s)
English
Rights
© 2024 Institute of Electrical and Electronics Engineers, All rights reserved.
Publication Date
12 Dec 2012
