Abstract
Due to the rising signal speed in today's integrated circuits (ICs), the digital input/output (I/O) device modeling becomes a very serious challenge. However, its nonlinearity issue was even less addressed. But for accurate EMC and EMI characterizations, the I/O nonlinearity could become a source of unexpected EMC and EMI troubles in the high-speed system. In this paper, we analyze the nonlinearity of high-speed drivers and loads under the influence of various parameters, such as the rising and falling times, data and clock duty cycle distortion (DCD), signal skew, balance of the circuit, etc. Further based on the spectrum property of their nonlinear responses, the possible impacts to EMC and EMI are discussed. Both load and driver's nonlinearity are analyzed. Then using the artificial neural-network (ANN) approaches, the nonlinear behavior of the high-speed digital I/O driver and load are modeled. This work provides a systematic study of the I/O nonlinearity and its behavior modeling process.
Recommended Citation
H. M. Yao et al., "Nonlinearity Of Digital I/Os And Its Behaviour Modeling," 2015 IEEE Electrical Design of Advanced Packaging and Systems Symposium, IEEE EDAPS 2015, pp. 35 - 38, article no. 7383702, Institute of Electrical and Electronics Engineers, Jan 2016.
The definitive version is available at https://doi.org/10.1109/EDAPS.2015.7383702
Department(s)
Electrical and Computer Engineering
Keywords and Phrases
ANN; EMC; High-Speed Driver; Nonlinearity; Parametric Model
International Standard Book Number (ISBN)
978-146738099-7
Document Type
Article - Conference proceedings
Document Version
Citation
File Type
text
Language(s)
English
Rights
© 2024 Institute of Electrical and Electronics Engineers, All rights reserved.
Publication Date
14 Jan 2016
