Abstract

Two capacitor loaded planar resonators are introduced in a two-cavity substrate integrated waveguide (SIW) structure to obtain a fourth order filter. The planar resonators each produce a transmission zero by signal interference. Design methodology for a 5 % bandwidth bandpass filter operating at 2.35 GHz is presented in the paper. Two transmission zeroes are placed on either side of the filter passband to obtain a quasi-elliptic response with a mid-band inserion loss of 1.65 dB. Good agreement is obtained between measured and simulated responses of the single-layer printed circuit board (PCB) filter.

Department(s)

Electrical and Computer Engineering

Keywords and Phrases

bandpass filter; chip capacitor; substrate integrated waveguide (SIW); transmission zero

International Standard Book Number (ISBN)

978-287487051-4

Document Type

Article - Conference proceedings

Document Version

Citation

File Type

text

Language(s)

English

Rights

© 2024 The Institute of Engineering and Technology, All rights reserved.

Publication Date

20 Nov 2018

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