One step in the synthesis procedure for realizing an asynchronous sequential switching circuit is the generation of next-state and output state equations from a simplified and coded flow table description of the circuit. The usual approach for determining these equations is to first construct a state table from the coded flow table, and then construct transition and output tables. For large flow tables this can be quite a lengthy procedure. This note describes an algorithm which simplifies the synthesis procedure for normal fundamental-mode circuits by permitting the determination of these equations without explicit construction of the state table, transition table, or output table. The algorithm has been programmed in PL/1. Copyright © 1969 by The Institute of Electrical and Electronics Engineers, Inc.
G. K. Maki et al., "Generation Of Design Equations In Asynchronous Sequential Circuits," IEEE Transactions on Computers, vol. C thru 18, no. 5, pp. 467 - 472, Institute of Electrical and Electronics Engineers, Jan 1969.
The definitive version is available at https://doi.org/10.1109/T-C.1969.222688
Electrical and Computer Engineering
Keywords and Phrases
Asynchronous sequential circuits; logical design; next-state and output state equations; sequential circuit synthesis; switching theory
International Standard Serial Number (ISSN)
Article - Journal
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01 Jan 1969