Abstract

One step in the synthesis procedure for realizing an asynchronous sequential switching circuit is the generation of next-state and output state equations from a simplified and coded flow table description of the circuit. The usual approach for determining these equations is to first construct a state table from the coded flow table, and then construct transition and output tables. For large flow tables this can be quite a lengthy procedure. This note describes an algorithm which simplifies the synthesis procedure for normal fundamental-mode circuits by permitting the determination of these equations without explicit construction of the state table, transition table, or output table. The algorithm has been programmed in PL/1. Copyright © 1969 by The Institute of Electrical and Electronics Engineers, Inc.

Department(s)

Electrical and Computer Engineering

Keywords and Phrases

Asynchronous sequential circuits; logical design; next-state and output state equations; sequential circuit synthesis; switching theory

International Standard Serial Number (ISSN)

0018-9340

Document Type

Article - Journal

Document Version

Citation

File Type

text

Language(s)

English

Rights

© 2023 Institute of Electrical and Electronics Engineers, All rights reserved.

Publication Date

01 Jan 1969

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