Root Cause Analysis for the Phase Noise of the Clock Generator
The performance of the high-speed links in the electronic system is highly dependent on the quality of the clock signal, which can be quantified by phase noise. The phase noise represents the instabilities of the signal in the frequency domain by measuring the power at various offsets from the carrier frequency. The root cause for the phase noise of the clock output at the resonance frequency is analyzed and identified in this paper. The power supply, the heat sink, and the external crystal are the main sources of the phase noise. Spurious occurs at the frequency of the power rail in the measured phase noise. The heat sink over the chip induces the conductive coupling noise to the clock. The low-frequency bump in the phase noise plot turns out to be induced by the external crystal design of the clock. More attention should be paid to the ground routing of the external crystal to ensure the quality of the clock output.
Y. Liu et al., "Root Cause Analysis for the Phase Noise of the Clock Generator," Proceedings of the 2021 Joint IEEE International Symposium on EMC/SI/PI, and EMC Europe (2021, Raleigh, NC), pp. 329 - 333, Institute of Electrical and Electronics Engineers (IEEE), Aug 2021.
The definitive version is available at https://doi.org/10.1109/EMC/SI/PI/EMCEurope52599.2021.9559352
2021 IEEE International Joint Electromagnetic Compatibility Signal and Power Integrity and EMC Europe Symposium, EMC/SI/PI/EMC Europe 2021 (2021: Jul. 26-Aug. 13, Raleigh, NC)
Electrical and Computer Engineering
Electromagnetic Compatibility (EMC) Laboratory
Keywords and Phrases
Clock Generator; Crystal Resonator; Ground Connection; Jitter; Phase Noise
International Standard Book Number (ISBN)
Article - Conference proceedings
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13 Aug 2021