Microprocessor Design Learning

Abstract

Learning microprocessor design generally involves taking an upper undergraduate, or graduate, level Computer Engineering (CpE) course, or multiple such courses, which teach design using Hardware Descriptive Languages (HDL), such as, VHDL. While this methodology is optimal, and highly recommended and required, for CpE majors, the practice is not suitable for non-CpE majors, such as Electrical Engineering (EE) undergraduate majors, who may not have HDL programming skills at the sophomore or junior level. This state is particularly true if HDL are not covered in the required Introduction to Digital Logic course, which is generally the first computer engineering sophomore level course that all EE/CpE/CS majors take. In addition, the most common subsequent course that EE/CpE/CS majors take, in the realm of computer engineering, is a first course in embedded systems and microcontrollers, in which students are exposed to a microcontroller family, including a discussion on how a microprocessor executes different instructions. In order to ease the understanding of microprocessor basics, the discussion usually includes a smaller subset of an actual microprocessor core, which can be called a mini-processor. It is in this setting that students are first exposed to microprocessor design. The learning can then be enhanced by incorporating a project, in which, students are required to create a version of the mini-processor by adding instructions to the current mini-processor instruction set. Since students, taking this microcontroller course, most likely, will not have experience programming using HDL, the processor discussion, demonstration and project work must be done using a different tool. One of the available tools is schematic capture. Students taking the embedded systems class, know how to program in a schematic capture environment, which makes it an ideal platform for learning basic microprocessor operation and building variations, of the mini-processor, via an in-class project. Past implementation of a mini-processor, using schematic capture, has concentrated on the processor core of the Intel 8051 microcontroller family. As technology has evolved over time, the 8051 family, and its operation, has grown obsolete in favor of faster microprocessors such as the AVR family of microcontrollers. The AVR processor uses Harvard Architecture to achieve a maximum throughput of one instruction per clock cycle. A Weekend Instruction Microprocessor (WIMP) version for the AVR processor, WIMP-AVR, was designed to allow students to learn and understand how the newer and faster AVR processor operates. This experiential learning project was created by undergraduate students enrolled in the Electrical Engineering degree program. The AVR processor was designed with Quartus II software using schematic capture files of digital circuits through block diagram files (BDF). The paper discusses the creation of the WIMP AVR processor, using schematic capture, the additional features added, to help students understand the operation of the AVR processor, and the emulation of the processor on the popular Intel DE2 FPGA board.

Meeting Name

2020 ASEE Virtual Annual Conference (2020: Jun. 22-26, Virtual)

Department(s)

Electrical and Computer Engineering

International Standard Serial Number (ISSN)

2153-5965

Document Type

Article - Conference proceedings

Document Version

Citation

File Type

text

Language(s)

English

Rights

© 2021 American Society for Engineering Education (ASEE), All rights reserved.

Publication Date

22 Jun 2020

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