Race Conditions among Protection Devices for a High Speed I/O Interface
Abstract
The ESD coupling path and on-board impedances strongly affect the ESD rise time seen on a PCB trace. Possible race conditions between external and on-die ESD protection were studied using measurement-based models of the transient response and on-board passives. Results show the interplay of rise time and protection turn-on can prevent the external TVS from responding in time.
Recommended Citation
J. Zhou et al., "Race Conditions among Protection Devices for a High Speed I/O Interface," Proceedings of the 42nd Annual Electrical Overstress/Electrostatic Discharge Symposium (2020, Reno, NV), pp. 1 - 6, Institute of Electrical and Electronics Engineers (IEEE), Nov 2020.
Meeting Name
42nd Annual EOS/ESD Symposium (2020: Sep. 13-18, Reno, NV)
Department(s)
Electrical and Computer Engineering
Research Center/Lab(s)
Electromagnetic Compatibility (EMC) Laboratory
International Standard Book Number (ISBN)
978-172819461-5
International Standard Serial Number (ISSN)
0739-5159
Document Type
Article - Conference proceedings
Document Version
Citation
File Type
text
Language(s)
English
Rights
© 2020 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.
Publication Date
10 Nov 2020
Comments
National Science Foundation, Grant IIP-1916535