Through Silicon Via Time Domain Crosstalk Modeling Considering Hysteretic Coupling Capacitance
Abstract
The paper deals with the time domain modeling of the hysteretic behavior of the coupling capacitance from a through silicon via (TSV). The model is developed in such a way that it can be implemented into standard circuit simulators. Results showing the effect of the hysteresis on the electrical performances of the signal channel containing the TSV are shown and discussed.
Recommended Citation
S. Piersanti et al., "Through Silicon Via Time Domain Crosstalk Modeling Considering Hysteretic Coupling Capacitance," Proceedings of the IEEE International Symposium on Electromagnetic Compatibility (2015, Dresden, Germany), pp. 567 - 572, Institute of Electrical and Electronics Engineers (IEEE), Aug 2015.
The definitive version is available at https://doi.org/10.1109/ISEMC.2015.7256225
Meeting Name
IEEE International Symposium on Electromagnetic Compatibility, EMC 2015 (2015: Aug. 16-22, Dresden, Germany)
Department(s)
Electrical and Computer Engineering
Research Center/Lab(s)
Electromagnetic Compatibility (EMC) Laboratory
Keywords and Phrases
circuit modeling; hysteresis; non linear effects; Through Silicon Vias; time domain modeling
International Standard Book Number (ISBN)
978-147996615-8
International Standard Serial Number (ISSN)
1077-4076
Document Type
Article - Conference proceedings
Document Version
Citation
File Type
text
Language(s)
English
Rights
© 2015 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.
Publication Date
01 Aug 2015
