Variable Bit Truncation Technique for Approximate Stochastic Computing (ASC)
Abstract
Lately, stochastic computing (SC) has been found to be significantly advantageous in image processing applications because of its lower hardware complexity and power consumption. However, its viability is deemed to be limited due to excessive run-time requirement. In this paper, a new technique called the variable bit truncation approximate stochastic computing (ASC) approach focusing on image processing applications is proposed to reduce the computation time of a SC with an acceptable trade-off in accuracy. The proposed technique is to variably truncate the low-order bits of the image pixel value depending on the application and the accuracy limits. Experimental results on standard test images for multiple image processing applications suggest that by using this approach acceptable output images can be generated using stochastic computation at a much faster way.
Recommended Citation
R. Seva et al., "Variable Bit Truncation Technique for Approximate Stochastic Computing (ASC)," Proceedings of the 14th International SoC Design Conference (2017, Seoul, South Korea), pp. 73 - 74, Institute of Electrical and Electronics Engineers (IEEE), May 2018.
The definitive version is available at https://doi.org/10.1109/ISOCC.2017.8368832
Meeting Name
14th International SoC Design Conference, ISOCC 2017 (2017: Nov. 5-8, Seoul, South Korea)
Department(s)
Electrical and Computer Engineering
Keywords and Phrases
Economic And Social Effects; Green Computing; Stochastic Systems, Bit Truncation; Computation Time; Hardware Complexity; Image Pixel Value; Image Processing Applications; Multiple Image; Stochastic Computations; Stochastic Computing, Image Processing
International Standard Book Number (ISBN)
978-153862285-8
Document Type
Article - Conference proceedings
Document Version
Citation
File Type
text
Language(s)
English
Rights
© 2018 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.
Publication Date
01 May 2018
