Sensitivity of NRZ and PAM4 Signaling Schemes to Channel Insertion Loss Deviation
Paper discusses channel Insertion Loss Deviation (ILD) effects on binary and multi-level signaling in high-speed link design. Overview of ILD phenomenon is given and its sources in a multi-stage transmission line are discussed. Comparison tests are provided for channels with different amount of ILD. The test channels were simulated to mimic backplane channels with daughter cards. In order to cause significant ILD, impedance mismatches and interconnect parasitic effects were introduced into the model. Results are analyzed in terms of eye diagram degradations due to ILD induced ISI noise.
G. Maghlakelidze et al., "Sensitivity of NRZ and PAM4 Signaling Schemes to Channel Insertion Loss Deviation," Proceedings of the 26th IEEE Conference on Electrical Performance of Electronic Packaging and Systems (2017, San Jose, CA), Institute of Electrical and Electronics Engineers (IEEE), Jan 2018.
The definitive version is available at https://doi.org/10.1109/EPEPS.2017.8329746
26th IEEE Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2017 (2017: Oct. 15-18, San Jose, CA)
Electrical and Computer Engineering
Electromagnetic Compatibility (EMC) Laboratory
Keywords and Phrases
Equalization; FFE; High-Speed Channels; ILD; NRZ; PAM4; Signal Integrity
International Standard Book Number (ISBN)
Article - Conference proceedings
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01 Jan 2018