Sensitivity of NRZ and PAM4 Signaling Schemes to Channel Insertion Loss Deviation

Abstract

Paper discusses channel Insertion Loss Deviation (ILD) effects on binary and multi-level signaling in high-speed link design. Overview of ILD phenomenon is given and its sources in a multi-stage transmission line are discussed. Comparison tests are provided for channels with different amount of ILD. The test channels were simulated to mimic backplane channels with daughter cards. In order to cause significant ILD, impedance mismatches and interconnect parasitic effects were introduced into the model. Results are analyzed in terms of eye diagram degradations due to ILD induced ISI noise.

Meeting Name

26th IEEE Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2017 (2017: Oct. 15-18, San Jose, CA)

Department(s)

Electrical and Computer Engineering

Research Center/Lab(s)

Electromagnetic Compatibility (EMC) Laboratory

Keywords and Phrases

Equalization; FFE; High-Speed Channels; ILD; NRZ; PAM4; Signal Integrity

International Standard Book Number (ISBN)

978-146736483-6

Document Type

Article - Conference proceedings

Document Version

Citation

File Type

text

Language(s)

English

Rights

© 2018 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.

Publication Date

01 Jan 2018

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