A Survey on Modeling Strategies for High-Speed Differential Via between Two Parallel Plates
This paper presents a survey on physics-based modeling strategies for differential via in high-speed multilayer printed circuits (PCBs). Driven by the goals of accurate and efficient design, researchers have explored several approaches for differential via modeling, include π-type RLC circuit, differential transmission line with via-plate capacitance/effective dielectric constant and parallel plate impedance model. This survey provides overviews of these modeling strategies and comparisons by correlating mixed-mode S-parameter from HFSS. In particular, this paper then aims on building a generic parameterized and SPICE-compatible circuit model for designing differential via in a frequency range up to 40GHz.
J. Xu et al., "A Survey on Modeling Strategies for High-Speed Differential Via between Two Parallel Plates," Proceedings of the 2017 IEEE International Symposium on Electromagnetic Compatibility & Signal/Power Integrity (2017, Washington, DC), pp. 527-531, Institute of Electrical and Electronics Engineers (IEEE), Aug 2017.
The definitive version is available at https://doi.org/10.1109/ISEMC.2017.8077926
2017 IEEE International Symposium on Electromagnetic Compatibility & Signal/Power Integrity, EMCSI (2017: Aug. 7-11, Washington, DC)
Electrical and Computer Engineering
Electromagnetic Compatibility (EMC) Laboratory
Cisco Systems, Inc.
National Science Foundation (U.S.)
Keywords and Phrases
Circuit simulation; Electromagnetic compatibility; Resonant circuits; Scattering parameters; Surveys; Differential via; Line models; Parallel plates; Physics-based modeling; Via modeling; SPICE; Parallel plates impedance; Physics based model; Tramsmission line model; Via model; Zpp
International Standard Book Number (ISBN)
International Standard Serial Number (ISSN)
Article - Conference proceedings
© 2017 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.
01 Aug 2017