Power Integrity with Voltage Ripple Spectrum Decomposition for Physics-Based Design

Abstract

A decomposition method for the PCB PDN voltage ripple caused by the IC switching current is developed based on an equivalent circuit model from a cavity model. The decomposition is presented both in frequency domain and time domain. Along with this decomposition approach, a one-to-one correspondence between the voltage ripple and the geometry is revealed. Guidelines to decrease the PCB PDN voltage ripple is also discussed and corroborated by both simulation and analytical calculation.

Meeting Name

2016 IEEE International Symposium on Electromagnetic Compatibility (2016: Jul. 25-29, Ottawa, Canada)

Department(s)

Electrical and Computer Engineering

Research Center/Lab(s)

Center for High Performance Computing Research

Second Research Center/Lab

Electromagnetic Compatibility (EMC) Laboratory

Keywords and Phrases

Design Guideline; Power Distribution Network Design; PDN Noise; Cavity Model; Switching Current; Equivalent Circuit; Voltage Ripple

International Standard Serial Number (ISSN)

2158-1118

Document Type

Article - Conference proceedings

Document Version

Citation

File Type

text

Language(s)

English

Rights

© 2016 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.

Publication Date

01 Jul 2016

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