Abstract
This paper investigates the power bus noise and power bus impedance of printed circuit boards with four different kinds of embedded capacitance. These boards have power-ground plane pairs separated by a very thin layer of material with high dielectric permittivity. It is shown that embedded capacitance effectively reduces power bus noise over the entire frequency range evaluated (up to 5 GHz).
Recommended Citation
M. Xu et al., "Mitigating Power Bus Noise with Embedded Capacitance in PCB Designs," Proceedings of the IEEE International Symposium on Electromagnetic Compatibility (2001, Montreal, Quebec), vol. 1, pp. 496 - 500, Institute of Electrical and Electronics Engineers (IEEE), Aug 2001.
The definitive version is available at https://doi.org/10.1109/ISEMC.2001.950691
Meeting Name
IEEE International Symposium on Electromagnetic Compatibility (2001: Aug. 13-17, Montreal, Quebec)
Department(s)
Electrical and Computer Engineering
Research Center/Lab(s)
Electromagnetic Compatibility (EMC) Laboratory
Keywords and Phrases
Capacitance; Embedded Systems; Frequencies; Permittivity; Spurious Signal Noise, Power Bus Noise, Printed Circuit Design; Capacitors; Dielectric Materials; Circuit Noise; Printed Circuits; Clocks; Frequency; Composite Materials; Circuit Testing; Electromagnetic Compatibility; Multichip Modules; Electromagnetic Interference; Frequency Range; Power Bus Noise Mitigation; Power Bus Impedance; Printed Circuit Boards; PCB Designs; EMI; EMC; Embedded Capacitance; Power-Ground Plane Pairs; Dielectric Permittivity
International Standard Book Number (ISBN)
780365690
International Standard Serial Number (ISSN)
0190-1494
Document Type
Article - Conference proceedings
Document Version
Final Version
File Type
text
Language(s)
English
Rights
© 2001 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.
Publication Date
01 Aug 2001
