Abstract
PCB traces routed near board edges and carrying high-speed signals are considered to contribute to EMI problems. Consequently, design maxims state that traces that might have intentional or unintentional high frequency components on them be kept away from board edges. This costs valuable surface area as boards become more densely designed. Further, design maxims concerning traces near board edges are not well quantified. The increase in EMI as a trace is routed increasingly closer to the PCB edge has been studied experimentally and with numerical modeling.
Recommended Citation
D. P. Berg et al., "FDTD and FEM/MOM Modeling of EMI Resulting from a Trace Near a PCB Edge," Proceedings of the IEEE International Symposium on Electromagnetic Compatibility (2000, Washington, D.C.), vol. 1, pp. 135 - 140, Institute of Electrical and Electronics Engineers (IEEE), Aug 2000.
The definitive version is available at https://doi.org/10.1109/ISEMC.2000.875551
Meeting Name
IEEE International Symposium on Electromagnetic Compatibility (2000: Aug. 21-25, Washington, DC)
Department(s)
Electrical and Computer Engineering
Research Center/Lab(s)
Electromagnetic Compatibility (EMC) Laboratory
Keywords and Phrases
EMI Problems; FDTD Modeling; FEM/MOM Modeling; PCB Edge; PCB Layout; PCB Traces; Design Maxims; Electromagnetic Interference; Experiment; Finite Difference Time-Domain Analysis; Finite Element Analysis; High Frequency Components; High-Speed Signals; Method of Moments; Numerical Modeling; Printed Circuit Design; Printed Circuit Layout; Trace Routing
International Standard Book Number (ISBN)
780356772
International Standard Serial Number (ISSN)
0190-1494
Document Type
Article - Conference proceedings
Document Version
Final Version
File Type
text
Language(s)
English
Rights
© 2000 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.
Publication Date
01 Aug 2000