Abstract
Susceptibility scanning is an increasingly adopted method for root cause analysis of system-level immunity sensitivities. It allows localizing affected nets and integrated circuits (ICs). Further, it can be used to compare the immunity of functionally identical or similar ICs or circuit boards. This paper explains the methodology as applied to electrostatic discharge and provides examples of scan maps and signals probed during immunity scanning. Limitations of present immunity analysis methods are discussed.
Recommended Citation
G. Muchaidze and J. Koo and Q. Cai and T. Li and L. Han and A. Martwick and K. Wang and J. Min and J. L. Drewniak and D. Pommerenke, "Susceptibility Scanning as Failure Analysis Tool for System-Level Electrostatic Discharge (ESD) Problems," IEEE Transactions on Electromagnetic Compatibility, vol. 50, no. 2, pp. 268 - 276, Institute of Electrical and Electronics Engineers (IEEE), May 2008.
The definitive version is available at https://doi.org/10.1109/TEMC.2008.921059
Department(s)
Electrical and Computer Engineering
Research Center/Lab(s)
Electromagnetic Compatibility (EMC) Laboratory
Keywords and Phrases
Electrostatic Discharges (ESDs); Scanning; Susceptibility; Immunity; Failure Analysis; Integrated Circuits; Magnetic Susceptibility; Sensitivity Analysis; Susceptibility Scanning; System-Level Immunity Sensitivities; Electrostatic Discharge; Probes; Immunity Testing; Noise; Color; Couplings
International Standard Serial Number (ISSN)
0018-9375; 1558-187X
Document Type
Article - Journal
Document Version
Final Version
File Type
text
Language(s)
English
Rights
© 2008 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.
Publication Date
01 May 2008
