Analysis and modeling of power supply induced jitter for high speed driver and low dropout voltage regulator

Author

Yin Sun

Abstract

”With the scaling of power supply voltage levels and improving trans-conductance of drivers, the sensitivity of drivers to power supply induced delays has increased. The power supply induced jitter (PSIJ) has become one of the major concerns for high-speed system. In this work, the PSIJ analysis and modeling method are proposed for high speed drivers and the system with on-die low dropout (LDO) voltage regulator. In addition, a jitter-aware target impedance concept is proposed for power distribution network (PDN) design to correlate the PSIJ with PDN parasitic.

The proposed PSIJ analysis model is based on the driver power supply rejection ratio (PSRR) response, transition edge slope and the propagation delay. It is demonstrated that the proposed model can be generalized for different type of drivers. Following the proposed PSIJ model, a method for improving the PSIJ simulation accuracy in the input/output buffer information (IBIS) model is also proposed. A PSIJ analysis method is also proposed for system with on-die LDO. The approach relies on separate analysis of the LDO block PSRR response and the buffer block PSIJ sensitivity. This procedure allows designer to evaluate the system PSIJ with fewer and faster simulations.

For the jitter-aware target impedance, a systematic procedure to develop the target impedance curves is formulated and developed for common CMOS buffer circuits. Given the transient IC switching current and the jitter specification, multiple target impedance curves can be defined for a specific circuit. The proposed design procedure can largely relieve over-constrain in the PDN designed based on the original target impedance definition”--Abstract, page iv.

Advisor(s)

Hwang, Chulsoon

Committee Member(s)

Fan, Jun, 1971-
Beetner, Daryl G.
Kim, DongHyun
Wu, Songping
Kim, Jingook

Department(s)

Electrical and Computer Engineering

Degree Name

Ph. D. in Electrical Engineering

Research Center/Lab(s)

Electromagnetic Compatibility (EMC) Laboratory

Publisher

Missouri University of Science and Technology

Publication Date

Fall 2020

Pagination

xviii, 114 pages

Note about bibliography

Includes bibliographic references (pages 107-113).

Rights

© 2020 Yin Sun, All rights reserved.

Document Type

Dissertation - Open Access

File Type

text

Language

English

Thesis Number

T 11985

Recommended Citation

Sun, Yin, "Analysis and modeling of power supply induced jitter for high speed driver and low dropout voltage regulator" (2020). Doctoral Dissertations. 3080.
https://scholarsmine.mst.edu/doctoral_dissertations/3080