Doctoral Dissertations
Abstract
"Globalization of micro-chip fabrication has opened a new avenue of cyber-crime. It is now possible to insert hardware Trojans directly into a chip during the manufacturing process. These hardware Trojans are capable of destroying a chip, reducing performance or even capturing sensitive data. To date, defensive methods have focused on detection of the Trojan circuitry or prevention through design for security methods.
This dissertation presents a shift away from prevention and detection to a design methodology wherein one no longer cares if a Trojan is present or not. The Randomized Encoding of Combinational Logic for Resistance to Data Leakage or RECORD process is presented in the first of three papers. This chip design process utilizes dual rail encoding and Quilt Packaging to create a secure combinational design that can resist data leakage even when the full design is known to an attacker. This is done with only a 2.28x-2.33 x area increase and 1.7x-2.24x increase in power. The second paper describes a new method, Sequential RECORD, which introduces additional randomness and moves to 3D split manufacturing to isolate the secure areas of the design. Sequential RECORD is shown to work with 3.75x area overhead and 4.5x power increase with a 3% reduction in slack. Finally, the RECORD concept is refined into a Time Division Multiplexed (TDM) version in the third paper, which reduces area and power overhead by 63% and 56% respectively. A method to safely utilize commercial chips based on the TDM RECORD concept is also demonstrated. This method allows the commercial chip to be operated safely without modification at the cost of latency, which increases by 3.9x"--Abstract, page iv.
Advisor(s)
Beetner, Daryl G.
Committee Member(s)
Shi, Yiyu
Tauritz, Daniel R.
Choi, Minsu
Cutitaru, Mihail T.
Department(s)
Electrical and Computer Engineering
Degree Name
Ph. D. in Electrical Engineering
Publisher
Missouri University of Science and Technology
Publication Date
Summer 2017
Journal article titles appearing in thesis/dissertation
- Protecting integrated circuits from hardware Trojans with random data encoding and split manufacturing
- Combating data leakage Trojans in sequential circuits through randomized encoding
- Combating data leakage Trojans in commercial and asic applications with time division multiplexing and random encoding
Pagination
x, 97 pages
Note about bibliography
Includes bibliographic references.
Rights
© 2017 Travis Edward Schulze, All rights reserved.
Document Type
Dissertation - Open Access
File Type
text
Language
English
Thesis Number
T 11186
Electronic OCLC #
1003043495
Recommended Citation
Schulze, Travis Edward, "Randomized encoding of combinational and sequential logic for resistance to hardware Trojans" (2017). Doctoral Dissertations. 2588.
https://scholarsmine.mst.edu/doctoral_dissertations/2588