Doctoral Dissertations

Keywords and Phrases

High speed digital sysytems; Lumped circuit model for printed circuit boards; Power distribution networks; Statistical crosstalk analysis

Abstract

"High-speed digital systems are moving to higher data rates and smaller supply voltages as the scale of integration goes smaller. With the smaller bit periods and the smaller operating voltages, the tolerable timing and noise margins are reducing. There are many sources of disturbances contributing to the tolerance margins. These margins have to account for inter symbol interference (ISI), reflections, jitter, noise from power distribution networks (PDN) and crosstalk. An important task during the design phase of the system is to find and mitigate the noise from such sources. This thesis proposes modeling and analysis methodology to resolve some of the problems while proposing relevant design methodologies to reduce the system design cycles.

PDN design forms a critical part of a high-speed digital design to provide a low-noise power supply to the integrated circuits (ICs) within some peak voltage ripple for normal functioning. Switching of transistors in the IC leads to a high-frequency current draw and generates the simultaneous switching noise (SSN), which propagates along the PDN from the chip to the PCB and causes several EMI and SI problems. A physics-based modeling approach for PCB PDN is proposed which is used for analysis and design guideline development. A design methodology is developed which guides the designer to make better design decisions, knowing the impact on PDN performance without the use of full-wave tools. Crosstalk forms a critical part of the budget, and if ignored, can lead to design failures. A statistical method to find the distribution of crosstalk at the victim using the single bit response principle is proposed. The methodology is extended to multiple-aggressor system, and, can be used to identify worst case crosstalk and find dominant crosstalk contributors in a system."--Abstract, page iii.

Advisor(s)

Fan, Jun, 1971-

Committee Member(s)

Drewniak, James L.
Pommerenke, David
Beetner, Daryl G.
Ruehli, Albert E.
Achkir, Brice

Department(s)

Electrical and Computer Engineering

Degree Name

Ph. D. in Electrical Engineering

Publisher

Missouri University of Science and Technology

Publication Date

Spring 2015

Pagination

xiii, 121 pages

Note about bibliography

Includes bibliographic references (pages 116-120).

Rights

© 2015 Ketan Shringarpure, All rights reserved.

Document Type

Dissertation - Open Access

File Type

text

Language

English

Subject Headings

Printed circuits DesignCrosstalk -- Mathematical modelsElectric power distribution -- Mathematical modelsLumped elements (Electronics)

Thesis Number

T 10724

Electronic OCLC #

913408437

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