Abstract
The checksum technique is a low cost method to detect errors in matrix operations performed by processor arrays. The fault detection of this method is done only at problem termination, so this method is not an effective fault tolerance technique for large scale matrix multiplication.
This paper presents a new algorithm, the ID algorithm, which minimizes the fault-detection latency, In the ID algorithm, a fault is detected as soon a5 the fault occurs instead of at problem termination. For 112 processors, the fault-latency time of the ID algorithm is l/11 of that of checksum algorithm with a run-time penalty of O(nlog2 n) in an 11x11 matrix operation. This new algorithm has better performance in terms of error coverage and expected run time in large scale matrix multiplications such as signal and image processing, weather prediction, and finite element analysis.
Recommended Citation
Hong, Chul-Eui and McMillin, Bruce M., "Fault-Tolerant Parallel Matrix Multiplication with One Iteration Fault Detection Latency" (1991). Computer Science Technical Reports. 126.
https://scholarsmine.mst.edu/comsci_techreports/126
Department(s)
Computer Science
Keywords and Phrases
Application-Oriented Fault Tolerance, Multicomputers.
Report Number
CSc-91-06
Document Type
Technical Report
Document Version
Final Version
File Type
text
Language(s)
English
Rights
© 1991 University of Missouri - Rolla, All rights reserved
Publication Date
1991-09-15
Comments
The first Author is a Graduate Student.
This paper appears, in its entirety, in the Proceedings of the 15th International COMPSAC, September, 1991, pp. 665-672
This work was supported in part by the National Science Foundation under Grant Numbers MIP-8909749 and CDA-8820714, and in part by the AMOCO Faculty Development Program.