DC power-bus modeling in high-speed digital design using the finite-difference time-domain (FDTD) method is demonstrated herein. The dispersive character of the dielectric layers used in printed circuit board substrates is taken into account in this study. In particular, FR-4 is considered. The complex permittivity of the dielectric is approximated by a Debye model. A wide-band frequency response (100 MHz-5 GHz) is obtained through a single FDTD simulation. Good agreement is achieved between the modeled and measured results for a typical dc power-bus structure with multiple surface mount technology (SMT) decoupling capacitors placed on the printed circuit board (PCB). The FDTD method is then applied to investigate some general approaches of power-bus noise decoupling
X. Ye et al., "DC Power-Bus Design using FDTD Modeling with Dispersive Media and Surface Mount Technology Components," IEEE Transactions on Electromagnetic Compatibility, Institute of Electrical and Electronics Engineers (IEEE), Jan 2001.
The definitive version is available at http://dx.doi.org/10.1109/15.974638
Electrical and Computer Engineering
Keywords and Phrases
100 MHz to 5 GHz; Debye Model; FDTD Modeling; FR-4; PCB; SMT; Circuit Noise; Complex Permittivity; Dc Power-Bus Design; Dielectric Layers; Digital Circuits; Dispersive Media; Electromagnetic Compatibility; Finite Difference Time-Domain Analysis; Finite-Difference Time-Domain Method; High-Speed Digital Design; Power Supply Circuits; Power-Bus Noise Decoupling; Printed Circuit Board; Printed Circuit Board Substrates; Printed Circuit Layout; Surface Mount Technology; Surface Mount Technology Components; Wide-Band Frequency Response
International Standard Serial Number (ISSN)
Article - Journal
© 2001 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.