The effectiveness of dc power-bus decoupling is impacted by the inductance associated with interconnect vias in printed circuit boards (PCB's). Adequate characterization of these interconnects is necessary to facilitate modeling and simulation, and to assess the effectiveness of added decoupling. In this study, a measurement procedure is presented for determining the series inductance and resistance of an interconnect with a network analyzer. The validity and limitations of the procedure are discussed. Experimental results of interconnect parameters on an 8 × 10 in ten-layer test-board corroborate those measured with a precision impedance analyzer. The measured interconnect values are used to simulate several cases of power-bus decoupling which show good agreement with two-port swept frequency measurements.
H. Shi et al., "An Experimental Procedure for Characterizing Interconnects to the DC Power Bus on a Multilayer Printed Circuit Board," IEEE Transactions on Electromagnetic Compatibility, vol. 39, no. 4, pp. 279-285, Institute of Electrical and Electronics Engineers (IEEE), Nov 1997.
The definitive version is available at http://dx.doi.org/10.1109/15.649812
Electrical and Computer Engineering
Electromagnetic Compatibility (EMC) Laboratory
Keywords and Phrases
DC Power Bus Decoupling; EMI; PCB; Circuit Analysis Computing; Electric Resistance Measurement; Electromagnetic Interference; Experimental Procedure; Experimental Results; Inductance; Interconnect Parameters; Interconnect Vias; Measurement Procedure; Multilayer Printed Circuit Board; Network Analyzer; Precision Impedance Analyzer; Printed Circuit Testing; Series Inductance; Series Resistance; Two-Port Swept Frequency Measurements; Decoupling; Interconnect Model; Multilayer PCB; Power Bus Modeling
International Standard Serial Number (ISSN)
Article - Journal
© 1997 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.