Abstract

Signal vias are commonly used in multilayer printed circuit board (PCB) design. For a signal via transitioning through the internal power and ground planes, the return current has to jump from one reference plane to another reference plane. The discontinuity of the return current at the via excites the power and ground planes, and results in power bus noise, and can produce an EMI problem as well. Numerical methods, such as finite-difference time-domain (FDTD), moment methods (MoM), and partial element equivalent circuit (PEEC), were employed herein to study this problem. The modeled results were supported by the measurements. In addition, the EMI mitigation approach of adding decoupling capacitors was investigated with the FDTD method.

Meeting Name

2nd Asia-Pacific Conference on Environmental Electromagnetics (2000: May 3-7, Shanghai, China)

Department(s)

Electrical and Computer Engineering

Research Center/Lab(s)

Electromagnetic Compatibility (EMC) Laboratory

Keywords and Phrases

DC Power Bus; EMI; Electromagnetic Interference; Equivalent Circuits; Finite Difference Time-Domain Analysis; Finite-Difference Time-Domain Method; Focal SMT Decoupling; Method of Moments; Moment Method; Multilayer Printed Circuit Board Design; Partial Element Equivalent Circuit; Printed Circuits; Reference Plane; Surface Mount Technology; Electric Network Analysis; Equivalent Circuits; Finite Difference Time Domain Method; Numerical Methods; Printed Circuit Boards; Printed Circuit Design; Printed Circuits; Reconfigurable Hardware; Decoupling Capacitor; EMI Mitigation; Finite-Difference Time Domains (FDTD); Multilayer Printed Circuit Board; Power And Ground Planes; Power Bus Noise; Reference Plane; Time Domain Analysis

International Standard Book Number (ISBN)

7563504206; 9787563504206

Document Type

Article - Conference proceedings

Document Version

Final Version

File Type

text

Language(s)

English

Rights

© 2000 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.

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