Automated synthesis and NULL cycle reduction optimization for asynchronous NULL convention circuits using industry-standard CAD tools
"This dissertation focuses on developing algorithms for design automation of asynchronous NULL Convention Logic (NCL) circuits. Despite the numerous benefits of NCL circuits, such as reduced timing effort, power dissipation, and electro-magnetic interference (EMI), increased robustness, and better suitability for System-on-Chip (SoC) design, the lack of an automated design flow continues to prevent its widespread usage in the semiconductor industry. A novel circuit synthesis algorithm and an automated throughput enhancement technique have been developed and integrated into the industry-standard Mentor Graphics CAD tool suite, such that NCL circuits can be specified as high-level algorithmic descriptions and automatically synthesized and optimized, like their synchronous counterparts"--Abstract, leaf iv.
Smith, Scott C.
Beetner, Daryl G.
McCracken, Theodore E.
Wilkerson, Ralph W.
Al-Assadi, Waleed K.
Electrical and Computer Engineering
Ph. D. in Computer Engineering
University of Missouri--Rolla
Journal article titles appearing in thesis/dissertation
- Threshold combinational reduction automation for synthesis of dual-rail asynchronous NULL convention digital circuits from high-level VHDL descriptions
- Automated NULL cycle reduction for asynchronous NULL convention digital circuits
ix, 70 leaves
© 2007 Bonita Bhaskaran, All rights reserved.
Dissertation - Citation
Library of Congress Subject Headings
Asynchronous circuits -- Computer-aided design
Logic, Symbolic and mathematical
Print OCLC #
Link to Catalog Record
Full-text not available: Request this publication directly from Missouri S&T Library or contact your local library.http://laurel.lso.missouri.edu/record=b6125835~S5
Bhaskaran, Bonita, "Automated synthesis and NULL cycle reduction optimization for asynchronous NULL convention circuits using industry-standard CAD tools" (2007). Doctoral Dissertations. 1730.
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