Masters Theses

Keywords and Phrases

NULL Convention Logic (NCL)

Abstract

"Among recent advancements in technology, nanotechnology is particularly promising. Most researchers have begun to focus their efforts on developing nano scale circuits. Nano scale devices such as carbon nano tubes (CNT) and silicon nano wires (SiNW) form the primitive building blocks of many nano scale logic devices and recently developed computing architecture. One of the most promising nanotechnologies is crossbar-based architecture, a two-dimensional nanoarray, formed by the intersection of two orthogonal sets of parallel and uniformly-spaced CNTs or SiNWs. Nanowire crossbars offer the potential for ultra-high density, which has never been achieved by photolithography. In an effort to improve these circuits, our research group proposed a new Null Convention Logic (NCL) based clock-less crossbar architecture. By eliminating the clock, this architecture makes possible a still higher density in reconfigurable systems. Defect density, however, is directly proportional to the density of nanowires in the architecture. Future work, therefore, must improve the defect tolerance of these asynchronous structures.

The thesis comprises two papers. The first introduces asynchronous crossbar architecture and concludes with the validation of mapping a 1-bit adder on it. It also discusses various advantages of asynchronous crossbar architecture over clock based nano structures.

The second paper concentrates on the probabilistic analysis of asynchronous nano crossbar architecture to address the high defect rates in these structures. It analyzes the probability distribution of mapping functions over the structure for varying number of defects and proposes a method to increase the probability of successful mapping"--Abstract, page iv.

Advisor(s)

Choi, Minsu

Committee Member(s)

McCracken, Theodore E.
Sedigh, Sahra

Department(s)

Electrical and Computer Engineering

Degree Name

M.S. in Computer Engineering

Publisher

Missouri University of Science and Technology

Publication Date

Fall 2008

Journal article titles appearing in thesis/dissertation

  • Clock-free nanowire crossbar architecture based on Null Conventional Logic (NCL)
  • Probabilistic analysis of design mapping in asynchronous nanowire crossbar architecture

Pagination

ix, 36 pages

Note about bibliography

Includes bibliographical references.

Rights

© 2008 Shikha Chaudhary, All rights reserved.

Document Type

Thesis - Open Access

File Type

text

Language

English

Library of Congress Subject Headings

Asynchronous circuits
Logic design
Nanostructured materials -- Design
Nanotubes
Nanowires

Thesis Number

T 9427

Print OCLC #

313457534

Electronic OCLC #

1114308562

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