Masters Theses


"The problem undertaken in this thesis is to study the simulated inductance observed in forward-biased abrupt junction p-n diodes with a highly doped p region and a nearly intrinsic n region and show that it is due to conductivity modulation. Unlike other analyses of this phenomenon, a voltage step is applied to the diode in such a direction as to forward bias it and the behavior of the injected minority carriers are observed. By comparing the resultant current through the diode to the relationship predicted by the equivalent circuit of the diode, an expression is obtained for the simulated inductance.

The transit time of the carriers injected from the p region into the nearly intrinsic n region is examined and is shown to be approximately the time required for the excess minority carrier distribution to reach its equilibrium value after a step of has been applied to the diode. The partial differential equation necessary to solve for the exact transient time is discussed.

The solution of the continuity equation for a standard diode is obtained both as a function of time and distance when a step of voltage is applied to the diode.

It is concluded that conductivity modulation is the cause of the simulated inductance observed and that this effect is present in all forward biased diodes, however, the diode must have a nearly intrinsic n region before the inductance is sufficiently large to be of value"--Abstract, p. ii


Nolte, Roger E.

Committee Member(s)

Gerson, Robert, 1923-2013
Walters, Frank Garnett
Long, Leland L.


Electrical and Computer Engineering

Degree Name

M.S. in Electrical Engineering


University of Missouri at Rolla

Publication Date



vi, 58 pages

Note about bibliography

Includes bibliographical references (pages 56-57)


© 1964 Everett Harold Vannoy, All rights reserved.

Document Type

Thesis - Open Access

File Type




Thesis Number

T 1551

Print OCLC #