"The oscillation on the phase voltage is due to the resonant structure formed by a parasitic loop (consisting of two FETs and the input decoupling capacitors) inductance and the output capacitance of the low side FET. Therefore, it is important to minimize this parasitic loop inductance. A simulation guideline is developed on full-wave modeling and simulation of buck converter layouts to estimate the parasitic loop inductances. Furthermore, this method is taken one step further to estimate the far-field radiation from the loop. These simulations were verified on six PCB variants of the buck converter and were compared with measurements in a semi anechoic chamber.
Later a layout optimization technique for dc-dc synchronous buck converter to suppress its EMI and minimize its parasitic loop inductance is discussed. Three different loop orientations were optimized for lowest loop inductance by proper placement of FETs, decoupling capacitors, vias, etc. The radiated emissions of these loops were compared and were also compared with full-wave simulation.
Co-simulation is a method which combines full-wave and non-linear SPICE solutions to obtain a model which reflects the real circuit behavior of the PCB. In the first part of this thesis, co-simulation is used to estimate the EMC related parameters of the dc-dc synchronous buck converter. Three different co-simulated strategies were examined and analyzed. Initially the phase voltage ringing was estimated and compared with the measured ringing on the phase voltage. After achieving a decent match, EMC parameters such as coupling in a TEM cell and coupled voltage on a conical antenna were co-simulated. These simulations were then verified by lab measurements. Important aspects, pros and cons of co-simulation are also discussed"--Abstract, page iv.
Beetner, Daryl G.
Corzine, Keith, 1968-
Electrical and Computer Engineering
M.S. in Electrical Engineering
Missouri University of Science and Technology
Journal article titles appearing in thesis/dissertation
- EMI prediction in switched power supplies by full-wave and non-linear circuit co-simulation
- Full-wave passive simulation strategy for buck converter EMI analysis
- Reduction of EMI and parasitic loop inductance of DC-DC converters by layout optimization
- DC-DC converter EMI reduction using PCB layout modification and its dipole moment estimation using GTEM cell
xi, 94 pages
© 2010 Ankit Bhargava, All rights reserved.
Thesis - Open Access
Electric current converters
SPICE (Computer file)
Print OCLC #
Electronic OCLC #
Link to Catalog Record
Bhargava, Ankit, "EMI suppression of DC-DC synchronous buck converters by layout optimizations and EMI prediction using non-linear and SPICE circuit co-simulation" (2010). Masters Theses. 105.