Evaluating Conduction Loss of a Parallel IGBT-MOSFET Combination

Jonathan W. Kimball, Missouri University of Science and Technology
Patrick L. Chapman

This document has been relocated to http://scholarsmine.mst.edu/ele_comeng_facwork/1030

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A variety of power devices are available to designers, each with specific advantages and limitations. For inverters, typically an IGBT combined with a p-i-n diode is used to obtain high current density. Recent developments in high-voltage MOSFETs support other alternatives. For example, a MOSFET can be paralleled with an IGBT to reduce losses at low currents, while the IGBT carries the load at high currents. The current work evaluates conduction losses in this configuration, showing applicability to generic inverters.