A CN-FDTD Scheme and Its Application to VLSI Interconnects/Substrate Modeling

James L. Drewniak, Missouri University of Science and Technology
Rui Qiang
Dagang Wu
Ji Chen
Chen Wang

This document has been relocated to http://scholarsmine.mst.edu/ele_comeng_facwork/1338

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In this paper, a two-dimensional (2D) Crank-Nicholason (CN) finite difference time domain (FDTD) method is proposed for VLSI interconnect/substrate characterization. Through rigorous truncation and dispersion error analyses, a guideline on using this technique is presented. Several iterative solvers are investigated to accelerate the solution of the CN-FDTD scheme. Numerical examples are given to demonstrate the accuracy and the efficiency of the proposed algorithm.