The Physical Noise Coupling Mechanism between Voltage Regulator Module (VRM) Noise Coupling to High-Speed Signal Traces is Analyzed and Different Noise Reduction Methods Are Analyzed for the First Time. the Rapid Switching of Field Effect Transistors (FETs) Creates an Unintentional Coupling Region Around the VRM. as High-Speed Traces Are Often Routed in the Inner Signal Layers of Printed Circuit Boards (PCBs) as Striplines for Signal Integrity, the VRM Switching Noise is Mainly Coupled from Noisy Power Vias to the Victim Traces Routed Around the VRM Region. to Analyze Different Coupling Reduction Methods in Practical High-Speed Channels, a Simplified PCB Design based on a High-Speed Server Platform is Proposed. Case Studies under Various Conditions Verifies the Most Effective VRM Noise Coupling Reduction Method. Different Design Parameters that Influence the VRM Noise Coupling Are Analyzed to Provide a Design Guide for High-Speed Channel Designers.
J. Joo et al., "Analysis of Voltage Regulator Module (VRM) Noise Coupling to High-Speed Signals with VRM Via Designs," 2023 Joint Asia-Pacific International Symposium on Electromagnetic Compatibility and International Conference on ElectroMagnetic Interference and Compatibility, APEMC/INCEMIC 2023, Institute of Electrical and Electronics Engineers, Jan 2023.
The definitive version is available at https://doi.org/10.1109/APEMC57782.2023.10217722
Electrical and Computer Engineering
Keywords and Phrases
PDN via design; via to trace coupling; voltage regulator module noise coupling; VRM power distribution network
Article - Conference proceedings
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01 Jan 2023