PCB/package stack-up design optimization is time-consuming and requiring a great deal of experience. Although some iterative optimization algorithms are applied to implement automatic stack-up design, evaluating the results of each iteration is still time-intensive. This paper proposes a combined Bayesian optimization-artificial neural network (BO-ANN) algorithm, utilizing a trained ANN-based surrogate model to replace a 2D cross-section analysis tool for fast PCB/package stack-up design optimization. With the acceleration of ANN, the proposed BO-ANN algorithm can finish 100 iterations in 40 seconds while achieving the target characteristic impedance. To better generalize the BO-ANN algorithm, a strategy of effective dielectric calculation is applied to multiple-dielectric stack-up optimization. the BO-ANN algorithm will be able to output optimized stack-up designs with dielectric layers chosen from the pre-defined library and the obtained designs are verified by 2D solver.
W. Huang et al., "Machine Learning Based PCB/Package Stack-up Optimization For Signal Integrity," Proceedings - Electronic Components and Technology Conference, pp. 1885 - 1891, Institute of Electrical and Electronics Engineers, Jan 2023.
The definitive version is available at https://doi.org/10.1109/ECTC51909.2023.00323
Electrical and Computer Engineering
Keywords and Phrases
artificial neural network; Bayesian optimization; deep learning; PCB/package stack-up design
International Standard Serial Number (ISSN)
Article - Conference proceedings
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01 Jan 2023