System Level Power Integrity Analysis with Physics-Based Modeling Methodology


A physics-based circuit modeling methodology is proposed in this paper for system level power integrity (PI) analysis. The circuit model is extracted by following the current paths in the system PDN based on cavity model and plane-pair PEEC models. The modeling methodology connects the footprints of geometry details to the PDN input impedance looking into the system from the IC chip. With further reductions of the physics-based circuit model, an engineering circuit model which explains the hierarchical charge delivery mechanism is proposed. The engineering circuit model reveals the role of PDNs from each level in the system. A commercial PDN system with a complex organic package, high-layer-count printed circuit board, and IC is used to validate the modeling methodology in the paper. The PDN input impedance has a good match with the impedance profile simulated with a commercial PI analysis tool for the system. The engineering circuit model is also validated for the PI analysis. The modeling methodology illustrates the fundamental physics in the PDN charge delivery and can be used for other PI analysis later.

Meeting Name

2018 IEEE Symposium on Electromagnetic Compatibility, Signal Integrity and Power Integrity, EMC, SI and PI 2018 (2018: Jul. 30-Aug. 3, Long Beach, CA)


Electrical and Computer Engineering

Keywords and Phrases

Busbars; Electric impedance; Electric impedance measurement; Electromagnetic compatibility; Integrated circuits; Printed circuit boards; Cavity model; Current paths; Input impedance; Physics-based circuit models; plane pair PEEC(PPP); Power integrity; System PDN; Circuit simulation

International Standard Book Number (ISBN)


Document Type

Article - Conference proceedings

Document Version


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© 2018 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.

Publication Date

01 Jul 2018