Modeling Interference Coupling between Two Orthogonal Strip Lines on Adjacent Layers
In multi-layer circuit boards of modern electronic equipment, signal lines and power distribution traces can be set orthogonally and sandwiched between two reference layers. To evaluate interference between such a intersecting strip line geometry, a lumped mutual capacitance model is proposed. Determining the scalar potential due to an assumed line charge at the intersection of the orthogonal traces leads to the distributed mutual capacitance between two lines. The results show that for typical printed circuit board geometries, the mutual capacitance can be approximated as a lumped element at the intersection of the two orthogonal strip line geometries. The proposed model is verified by comparing experimental and the computed results.
K. Araki et al., "Modeling Interference Coupling between Two Orthogonal Strip Lines on Adjacent Layers," Proceedings of the IEEE International Symposium on Electromagnetic Compatibility: EMC Europe (2008, Hamburg, Germany), Institute of Electrical and Electronics Engineers (IEEE), Sep 2008.
The definitive version is available at https://doi.org/10.1109/EMCEUROPE.2008.4786849
IEEE International Symposium on Electromagnetic Compatibility: EMC Europe (2008: Sep. 8-12, Hamburg, Germany)
Electrical and Computer Engineering
Electromagnetic Compatibility (EMC) Laboratory
Keywords and Phrases
Adjacent Layers; Interference Couplings; Line Charges; Lumped Elements; Multi-Layer Circuit Boards; Mutual Capacitances; Power Distributions; Reference Layers; Scalar Potentials; Signal Lines; Strip Lines; Two Lines; Amplifiers (Electronic); Capacitance; Electric Inverters; Intersections; Oscillators (Electronic); Plastic Molds; Printed Circuit Boards; Printed Circuit Manufacture; Strip Telecommunication Lines; Electromagnetic Compatibility
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Article - Conference proceedings
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01 Sep 2008