Efficient Complex Broadside Coupled Trace Modeling and Estimation of Crosstalk Impact using Statistical BER Analysis for High Volume, High Performance Printed Circuit Board Designs
Increase in the cost of printed circuit board (PCB) with the increase in layer count has led to the design of PCB stack-ups that have broadside coupled signals. Broadside coupling of signals in adjacent layers also leads to crosstalk that can be sometimes difficult to model and quantify in terms of its impact on receiver eye opening. The difficulty stems from the fact that in most boards, broadside coupling occurs between the signal traces at various angles and at multiple instances. The challenges involved in modeling include generating models for the broadside coupled section quickly without the overhead of time consuming full-wave simulations. Full wave simulations are time and memory intensive especially for coupled traces at an angle and real board designs can have hundreds of them. The simulation challenges include predicting the impact of crosstalk on bit error rate (BER) accurately. In this paper, the focus is on alleviating the modeling challenges by using fast equivalent per unit length (Eq. PUL) [1, 10] resistance, inductance, conductance, capacitance (RLGC) method for the broadside coupled traces crossing at an angle and to resolve the simulation challenge by seamlessly integrating the models into statistical simulation approach that can quantify the eye opening at various BERs that would help electrical designers to come up with set of design and routing guidelines that can save PCB cost and at the same time maintain electrical integrity.
A. R. Chada et al., "Efficient Complex Broadside Coupled Trace Modeling and Estimation of Crosstalk Impact using Statistical BER Analysis for High Volume, High Performance Printed Circuit Board Designs," Proceedings of the 63rd Electronic Components and Technology Conference (2013, Las Vegas, NV), pp. 2095 - 2101, Institute of Electrical and Electronics Engineers (IEEE), May 2013.
The definitive version is available at https://doi.org/10.1109/ECTC.2013.6575869
63rd Electronic Components and Technology Conference (2013: May 28-31, Las Vegas, NV)
Electrical and Computer Engineering
Electromagnetic Compatibility (EMC) Laboratory
Keywords and Phrases
Broadside-Coupled; Electrical Integrity; Full-Wave Simulations; Multiple Instances; Per-Unit-Length (PUL) RLGC; Printed Circuit Board Designs; Printed Circuit Boards (PCB); Statistical Simulation; Computer Simulation; Crosstalk; Design; Printed Circuit Boards; Broadside Coupling
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01 May 2013