Analytic Calculation of Jitter Induced by Power and Ground Noise Based on IBIS I/V Curve
Supply fluctuation is one of the most significant factors that cause jitter in high-speed I/O links. The traditional SPICE simulation or measuring method for power supply induced jitter is quite time-consuming and draining on resources. The I/O buffer information specification (IBIS) model is a popular standard for electronic behavioral specifications of digital integrated circuit I/O characteristics. Analytic jitter transfer functions for supply fluctuations are derived by solving two-order differential equations based on IBIS current versus voltage characteristics and pin package parameters. Then, the total time interval error induced by power and ground noise is obtained in both frequency domain and time domain. The method is validated by comparing the analytic calculation results with HSPICE simulated results for a DDR4 output buffer.
X. Chu et al., "Analytic Calculation of Jitter Induced by Power and Ground Noise Based on IBIS I/V Curve," IEEE Transactions on Electromagnetic Compatibility, vol. 60, no. 2, pp. 468 - 477, Institute of Electrical and Electronics Engineers (IEEE), Apr 2018.
The definitive version is available at https://doi.org/10.1109/TEMC.2017.2725270
Electrical and Computer Engineering
Electromagnetic Compatibility (EMC) Laboratory
Keywords and Phrases
I/O Buffer Information Specification (IBIS); Jitter; Jitter Transfer Function; Supply Fluctuation
International Standard Serial Number (ISSN)
Article - Journal
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01 Apr 2018