Presenter Information

K. J. Mikulcik

Department

Mechanical and Aerospace Engineering

Major

Mechanical Engineering

Abstract

Microchip thermal stress due to the temperature change related to the mounting of a chip to its lead frame was investigated by moire interferometry. Large scale models were made, and the problems of applying a grating to this model at high temperature were addressed without success. Further possibilities, however, remain to be attempted. Moire interferometry was successfully used at room temperature by examining mechanically relieved residual stresses. The results agreed with an analytical approach to stress analysis and also to a finite element analysis. A practical solution to the problem of peeling was found.

Document Type

Report

Presentation Date

16 Apr 1992

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