Masters Theses

Title

Defect avoidance in nano crossbar architecture

Keywords and Phrases

Programmable gate macro block (PGMB)

Abstract

"The thesis is organized into three papers...The first two papers evaluate three different logic mapping algorithms with defect avoidance to circumvent clustered defective cross points in nanowire reconfigurable crossbar architectures. The effectiveness of inherited redundancy and configurability utilization is demonstrated through extensive parametric simulations. The third paper discusses programming asynchronous nano crossbar architecture and demonstrates a method to find an optimal solution to the dimensions of proposed architecture through simulations"--Abstract, leaf iv.

Advisor(s)

Choi, Minsu

Committee Member(s)

Ali, Shoukat
McCracken, Theodore E.

Department(s)

Electrical and Computer Engineering

Degree Name

M.S. in Computer Engineering

Publisher

University of Missouri--Rolla

Publication Date

Spring 2007

Journal article titles appearing in thesis/dissertation

  • Inherited redundancy and configurability utilization for repairing nanowire crossbars with clustered defects
  • Cost-driven repairability optimization for nanowire crossbar architecture
  • Programming asynchronous nano crossbar architecture

Pagination

viii, 63 leaves

Rights

© 2007 Yadunandana Yellambalase, All rights reserved.

Document Type

Thesis - Citation

File Type

text

Language

English

Library of Congress Subject Headings

Asynchronous circuits
Computer architecture
Logic design
Nanowires

Thesis Number

T 9158

Print OCLC #

173667879

Link to Catalog Record

Full-text not available: Request this publication directly from Missouri S&T Library or contact your local library.

http://laurel.lso.missouri.edu/record=b6000572~S5

This document is currently not available here.

Share

 
COinS