Masters Theses

Abstract

"A new technique for combining multiple frequency standards into a single timing reference based on the average of the frequency of each input is described. The uniqueness of this approach is that it is an all-digital scheme utilizing delay lines and high-speed logic elements currently available. The present and future applications of combiners are discussed, the requirements are highlighted, several digital solutions are briefly described, and the detailed block diagrams and characteristics of a particular general purpose combiner are presented. It is suggested that the optimum combiner include a stable quartz crystal oscillator with a frequency control feature. The output of this internal clock is digitally divided into several phases via a tapped delay line. Periodically, as a function of each input standard, the phase is stored in a register. Any time two consecutive samples for any input differ, an accumulator is incremented or decremented by one, and the frequency of the internal clock is correspondingly changed. Throughout, emphasis is placed on digital approaches to problems associated with combining frequency standards"--Abstract, page ii.

Advisor(s)

Tracey, James H.

Committee Member(s)

Newell, John A.
Ho, C. Y. (Chung You), 1933-1988

Department(s)

Electrical and Computer Engineering

Degree Name

M.S. in Electrical Engineering

Publisher

University of Missouri--Rolla

Publication Date

1969

Pagination

vi, 52 pages

Rights

© 1969 Lynn James Hawkey, All rights reserved.

Document Type

Thesis - Open Access

File Type

text

Language

English

Library of Congress Subject Headings

Frequency standards
Timing circuits

Thesis Number

T 2244

Print OCLC #

6007963

Electronic OCLC #

806966879

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