Reducing Computational Time Delay in Digital Current-Mode Controllers for Dc-dc Converters
This document has been relocated to http://scholarsmine.mst.edu/mec_aereng_facwork/3466
There were 14 downloads as of 28 Jun 2016.
Abstract
A new method to improve the performance of digital current-mode controllers used in dc-dc power conversion is introduced. The proposed scheme is based on a simple prediction method which offers more time for DSP calculations than its conventional counterparts. Therefore, there will be less DSP computational time delay, which results in faster dynamic response and more accuracy and stability in power electronic converters. Principles of operation of the proposed prediction method as well as its application to several digital control techniques are presented.
This paper has been withdrawn.
