Modeling of Substrate Noise Effects in Dynamic CMOS Circuits
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Abstract
The decrease in the feature size has led to the integration of both digital and analog circuits on the same silicon die which has led to many crosstalk issues. The crosstalk due to the substrate interactions also plagiarizes complete digital systems. This paper lays emphasis on this fact and because of the vulnerability of dynamic CMOS circuits to noise; a brief study of the effects of substrate variations on the performance of the dynamic CMOS circuits is carried out in this paper. The effects of substrate noise at very high frequencies (above 10 GHz) are also depicted in this paper. In order to accurately estimate the effects of substrate noise a substrate model is proposed and verified for functionality in the last section of this paper.
