Evaluating the Repair of System-on-Chip (SoC) using Connectivity
This paper presents a new model for analyzing the repairability of RSoC (Reconfigurable System-on-Chip) Instrumentation with repair process. It exploits the connectivity of the interconnected cores in which unreliability factors due to both neighboring cores and interconnect structure are taken into account. Based on the connectivity, two RSoC repair scheduling strategies, Minimum Number of Interconnections First (I-MIN) and Minimum Number of Neighboring Cores First (C-MIN) are proposed. Two other scheduling strategies, Maximum Number of Interconnections First (I-MAX) and Maximum Number of Neighboring Cores First (C-MAX) are also introduced and analyzed to further explore the impact of connectivity-based repair scheduling on the overall repairability of RSoCs. Extensive parametric simulations demonstrate the efficiency of the proposed RSoC repair scheduling strategies; thereby manufacturing ultimately reliabile RSoC instrumentation can be achieved.
M. Choi et al., "Evaluating the Repair of System-on-Chip (SoC) using Connectivity," Proceedings of the 20th IEEE Instrumentation and Measurement Technology Conference (2003, Vail, CO), vol. 1, pp. 309-314, Institute of Electrical and Electronics Engineers (IEEE), May 2003.
The definitive version is available at https://doi.org/10.1109/IMTC.2003.1208172
20th IEEE Instrumentation and Measurement Technology Conference: IMTC (2003: May 20-22, Vail, CO)
Electrical and Computer Engineering
Keywords and Phrases
Computer Simulation; Embedded Systems; Reliability; Repair; Scheduling; Systems Analysis; Application Specific Integrated Circuits; Integrated Circuit Interconnects; Microprocessor Chips; Programmable Logic Controllers; Connectivity; Interconnection Networks; System-on-Chip; Configurability; Interconnect Structures; Parametric Simulations; Reconfigurable System-on-Chip (RSoC); Reconfigurable Systems; Repairability; System on Chips (SoC)
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