Title

Modeling of the Immunity of ICs to EFTs

Abstract

Investigation of the immunity of ICs to EFTs is increasingly important. In this paper, an accurate model of a microcontroller is developed and verified. This model consists of two parts: a passive Power Distribution Network (PDN) model and an active I/O protection network model. Measurement methods are designed to extract the parameters of the passive PDN model. The accuracy of the overall model of the IC is verified using both S parameter tests and EFT injection tests. The model is able to accurately predict the voltage and current at power-supply and I/O pins and correctly accounts for the active components of the I/O protection network.

Meeting Name

2010 IEEE International Symposium on Electromagnetic Compatibility, EMC 2010 (2010: Jul. 25-30, Fort Lauderdale, FL)

Department(s)

Electrical and Computer Engineering

Research Center/Lab(s)

Electromagnetic Compatibility (EMC) Laboratory

Keywords and Phrases

Integrated Circuit Modeling; Semiconductor Device Measurement; Clamps; Power Measurement; Impedance; Pins

International Standard Book Number (ISBN)

978-1-4244-6305-3

International Standard Serial Number (ISSN)

2158-110X

Document Type

Article - Conference proceedings

Document Version

Citation

File Type

text

Language(s)

English

Rights

© 2010 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.

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