Practical Verification of Power Delivery Networks for Smart TV Applications
This paper introduces a practical methodology to improve power integrity performance of the chip-package-PCB systems for smart TVs. For power integrity analysis, a chip, package and PCB are modeled as lumped element circuits for simplicity. Case studies are presented to optimize MLCC placement using chip-package-PCB co-simulation under fixed SoC design. In case studies, CPU power net of an application processor is chosen, and voltage droop is measured as a design weight on each physical domains. The introduced methodology is evaluated through experimental verifications.
B. Ko et al., "Practical Verification of Power Delivery Networks for Smart TV Applications," Proceedings of the 2015 IEEE International Conference on Consumer Electronics (2015, Las Vegas, NV), pp. 594-595, Institute of Electrical and Electronics Engineers (IEEE), Jan 2015.
The definitive version is available at https://doi.org/10.1109/ICCE.2015.7066541
2015 IEEE International Conference on Consumer Electronics, ICCE 2015 (2015: Jan. 9-12, Las Vegas, NV)
Electrical and Computer Engineering
Keywords and Phrases
AP; Decoupling Capacitor; ODC; ODR; On Co-Simulation; Power Integrity; Power Modeling; Power Noise
International Standard Book Number (ISBN)
Article - Conference proceedings
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