Effectiveness Analysis of De-Embedding Method for Typical TSV Pairs in a Silicon Interposer
In this paper, a de-embedding method to extract the performance of a Through-Silicon-Via (TSV) pair is proposed, using a set of specially designed test patterns to remove the pads and connection trace. Considering in real implementations, wafer probe measurements are required to access the test structures, and any errors in the probe calibration affect the test pattern measurements, a micro-probe model is built in with the test. Short-Open-Load (SOL) calibration method is used with the simulation results to calibrate or correct to the tips of the micro-probe used in all test patterns. Calibrated responses for the test patterns consisting of probing pads, traces and TSV pair, thus are used with previously proposed de-embedding algorithm to characterize the TSV pair. The effectiveness and the robustness of the de-embedding method against probe calibration errors are tested with the full wave simulation results and analytical calculations.
Q. Wang et al., "Effectiveness Analysis of De-Embedding Method for Typical TSV Pairs in a Silicon Interposer," 2014 IEEE 23rd Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2014, pp. 239-242, Institute of Electrical and Electronics Engineers (IEEE), Oct 2014.
The definitive version is available at http://dx.doi.org/10.1109/EPEPS.2014.7103643
23rd IEEE Conference on Electrical Performance of Electronic Packaging and Systems (2014: Oct. 26-29, Portland, OR)
Electrical and Computer Engineering
Center for High Performance Computing Research
Keywords and Phrases
Calibration; Electronics packaging; Integrated circuit interconnects; Integrated circuit manufacture; Probes; Silicon wafers; Sols; analytical; Calibration patterns; de-embedded; Full-wave simulations; TSV; Three dimensional integrated circuits; SOL calibration
International Standard Book Number (ISBN)
Article - Conference proceedings
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