Abstract

This paper presents a BIST design for CCD-based digital imaging system. Pixels on a CCD are not free from defective or faulty pixels due to numerous causes such as imperfect fabrication, excessive exposure to light, radiation, sensing element aging, and excessive mechanical shock, to mention a few. Today's high demand for high resolution CCDs is dictating defect/fault-tolerance in such devices. Especially, traditional on-device BIST cannot be readily employed on the imaging devices such as CCD due to the unique requirement that no pixel can be utilized to repair or bypass a defect on any other pixels. Therefore, the BIST technique designed and simulated in this paper is a technique to test and repair the defects on pixels off the device, referred to as off-device tolerance. The basic idea was proposed in our previous work in [2] where the off-device defect/fault tolerance was investigated and a soft-test/repair technique was theoretically proposed in order to demonstrate the efficiency and effectiveness in terms ofreliability, referred to as virtual yield. A Verilog-based design and simulation is provided to demonstrate the validity of the off-device soft-test/repair in terms of reliability (or virtual yield) enhancement and performance.

Meeting Name

IEEE Instrumentation and Measurement Technology Conference: IMTC: Synergy of Science and Technology in Measurement (2007: May 1-3, Warsaw, Poland)

Department(s)

Electrical and Computer Engineering

Keywords and Phrases

BIST (Built-In Self-Test); CCD (Charge Coupled Device); Defect/Fault Tolerance; Soft-Test/Repair; Computer Simulation; Fault Tolerance; Image Processing; Pixels; BIST Design; Excessive Mechanical Shock; Imperfect Fabrication; Sensing Element Aging; Imaging Systems

International Standard Book Number (ISBN)

1424405882

International Standard Serial Number (ISSN)

1091-5281

Document Type

Article - Conference proceedings

Document Version

Final Version

File Type

text

Language(s)

English

Rights

© 2007 Institute of Electrical and Electronics Engineers (IEEE), All rights reserved.

Publication Date

01 May 2007

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